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Unless it’s something like an HDL for a proprietary FPGA suite, in my experience, not really, no. Just need a good LSP, Treesitter grammar, and the rest is just QOL. Not having to switch tools is a perk.
Unless it’s something like an HDL for a proprietary FPGA suite, in my experience, not really, no. Just need a good LSP, Treesitter grammar, and the rest is just QOL. Not having to switch tools is a perk.